1. Technical Field
The present invention relates to methods for manufacturing semiconductor substrates and methods for manufacturing semiconductor devices, and in particular, is preferably applied to field effect transistors formed on a SOI (Silicon On Insulator) substrate.
2. Description of Related Art
The utility of field effect transistors formed on a SOI substrate is attracting attention because they are easy for element isolation and latch-up free, and have small source/drain junction capacitances. In particular, because fully depleted type SOI transistors can be operated with low power consumption and at high speeds, researches on operating SOI transistors in a completely depleted mode are actively conducted. It is noted here that, as a SOI substrate, for example, a SIMOX (Separation by Implanted Oxygen) substrate, a laminated substrate or the like may be used.
Further, for example, Japanese Laid-open Patent Application HEI 10-261799 (JP '799) describes a method for forming a silicon thin film excellent in crystallinity and uniformity on a dielectric film of a large area, in which an amorphous or polycrystal silicon layer formed on a dielectric film is irradiated with a pulse-like ultraviolet beam, thereby forming a polycrystal silicon film composed of single-crystal grains each in a generally square shape arranged in a chessboard pattern on the dielectric film, and the surface of the polycrystal silicon film is planarized by CMP (chemical mechanical polishing).
However, to manufacture a SIMOX substrate, highly concentrated oxygen needs to be ion-injected in a silicon wafer. Also, to manufacture a laminated substrate, two silicon wafers need to be bonded together, and then the surface of the silicon wafer needs to be polished. For this reason, there is a problem that SOI transistors result in a cost increase, compared to field effect transistors that are formed in bulk semiconductor.
Furthermore, there is a problem in that the ion-injection and polishing cause a SOI layer to have large differences in its film thickness such that it is difficult to stabilize the characteristics of field effect transistors when the SOI layer is made into a thin film for manufacturing fully depleted type SOI transistors.
Also, the method described in JP '799 has a problem in that grain boundaries are generated in the single-crystal layer formed on the dielectric film because single-crystal grains are arranged in a chessboard pattern on the dielectric film, and the controllability of the film thickness of the single-crystal layer is poor because the single-crystal layer is planarized by polishing.